Registers and Data Manipulation in Assembly

If Assembly language has a beating heart, it’s the registers. Almost every meaningful operation — arithmetic, comparisons, memory access, function calls — flows through a small set of tiny, blazing-fast storage locations inside the CPU. Once registers click for you, the rest of Assembly starts falling into place. Let’s go through them properly, from basics to some more advanced territory.

What Are Registers, Exactly?

Registers are small storage locations built directly into the CPU, used to hold data the processor is actively working with. Unlike RAM, which sits outside the CPU and requires relatively slow access over a memory bus, registers are physically part of the processor and can be accessed in a single clock cycle.

Because there are only a limited number of registers (far fewer than memory locations), managing what lives in which register at any given moment is one of the central skills in Assembly programming.

Registers vs. Memory: A Quick Comparison

x86-64 General-Purpose Registers

x86-64 provides 16 general-purpose registers, each 64 bits wide, with the ability to access smaller portions of each register independently:

This layered structure means you can operate on just the lowest byte of a register (al) without disturbing the rest of the register, which is useful for working with smaller data types efficiently.

ARM (AArch64) Registers

ARM’s 64-bit mode provides 31 general-purpose registers (x0–x30), each 64 bits wide, with 32-bit access available via the w0–w30 naming:

ARM’s larger, more uniform register set reflects its RISC design philosophy — more registers generally means fewer memory accesses are needed, which helps performance.

Special-Purpose Registers

Beyond general-purpose registers, both architectures include special registers essential to program execution:

• Program Counter / Instruction Pointer (rip on x86-64, pc on ARM) — holds the address of the next instruction to execute.
• Stack Pointer (rsp on x86-64, sp on ARM) — tracks the top of the current stack frame.
• Flags Register (rflags on x86-64, nzcv bits within pstate on ARM) — holds condition flags set by arithmetic and comparison instructions.

Understanding the Flags Register

The flags register is central to conditional logic in Assembly. Common flags include:

These flags drive conditional jumps. For example, after a cmp rax, rbx instruction, the CPU sets ZF if the values are equal, and a subsequent je (jump if equal) instruction checks exactly that flag.

Data Manipulation: Moving Data

The most fundamental operation in Assembly is moving data between registers and memory.

x86-64:

mov rax, 10          ; load immediate value into register
mov rbx, rax         ; copy register to register
mov [result], rax    ; store register value into memory
mov rax, [result]    ; load memory value into register

ARM (AArch64):

mov x0, #10          ; load immediate value into register
mov x1, x0           ; copy register to register
str x0, [result]     ; store register value into memory
ldr x0, [result]     ; load memory value into register

Notice ARM distinguishes explicitly between ldr (load from memory) and str (store to memory), while x86-64 uses the single mov mnemonic for both memory and register operations, relying on operand syntax (like brackets) to indicate memory access.

Arithmetic and Logical Data Manipulation

x86-64 examples:

add rax, rbx     ; rax = rax + rbx
sub rax, rbx     ; rax = rax - rbx
imul rax, rbx    ; rax = rax * rbx (signed multiply)
and rax, rbx     ; bitwise AND
or  rax, rbx     ; bitwise OR
xor rax, rax     ; commonly used to zero a register efficiently
shl rax, 2       ; shift left by 2 bits (multiply by 4)
shr rax, 2       ; shift right by 2 bits (unsigned divide by 4)

ARM equivalents:

add x0, x0, x1   ; x0 = x0 + x1
sub x0, x0, x1   ; x0 = x0 - x1
mul x0, x0, x1   ; x0 = x0 * x1
and x0, x0, x1   ; bitwise AND
orr x0, x0, x1   ; bitwise OR
eor x0, x0, x0   ; XOR, commonly used to zero a register
lsl x0, x0, #2   ; logical shift left
lsr x0, x0, #2   ; logical shift right

A small but interesting detail: xor rax, rax on x86-64 and eor x0, x0, x0 on ARM are both common idioms for zeroing a register, often preferred over mov reg, 0 because they can be encoded more compactly and sometimes execute faster on certain microarchitectures.

Addressing Modes

Addressing modes define how an instruction specifies the location of the data it operates on. Here are the most common ones in x86-64:

This last form, base + index × scale, is particularly powerful for iterating over arrays, since it lets the CPU calculate an array element’s address in a single instruction:

; accessing array[i] where each element is 4 bytes (int)
mov eax, [rbx + rcx*4]   ; rbx = array base, rcx = index i

Internal Process: How a Data Manipulation Instruction Executes

flowchart TD
    A[Instruction Fetched from Memory: add rax, rbx] --> B[Decoder Identifies Opcode and Operands]
    B --> C[Register File Supplies Values of rax and rbx]
    C --> D[ALU Performs Addition]
    D --> E[Result Written Back into rax]
    D --> F[Flags Register Updated: ZF, CF, SF, OF]
    E --> G[Program Counter Advances to Next Instruction]

This sequence — fetch, decode, read registers, compute, write back, update flags — happens for essentially every arithmetic or logical instruction you write, whether on x86-64, ARM, or any other architecture.

The Stack: A Special Kind of Data Manipulation

The stack is a region of memory used for temporary storage, function calls, and local variables, managed via the stack pointer register. Two of the most common stack operations are push and pop:

; x86-64
push rax     ; decrement rsp, store rax at new top of stack
pop  rbx     ; load value from top of stack into rbx, increment rsp

On ARM, since there’s no dedicated push/pop mnemonic in the same form, the equivalent is typically done with str/ldr combined with pre/post-indexing:

; ARM (AArch64)
str x0, [sp, #-16]!    ; store x0, decrement sp by 16 (pre-indexed)
ldr x0, [sp], #16      ; load x0, then increment sp by 16 (post-indexed)

The stack is essential for managing function calls — storing return addresses, saved registers, and local variables in a structured, last-in-first-out (LIFO) manner.

Register Allocation and Calling Conventions

When calling functions, especially across compiled languages like C, registers must be used according to a calling convention — an agreed-upon set of rules about which registers hold arguments, which hold return values, and which must be preserved across function calls.

Understanding calling conventions is essential when writing Assembly that interfaces with C code, since getting register usage wrong will corrupt data or crash the program in ways that are often difficult to trace.

Best Practices for Working with Registers

• Track register usage carefully — comment which register holds which logical value, especially in longer routines.
• Respect calling conventions when interfacing with other code, particularly C libraries.
• Preserve callee-saved registers if your function modifies them, typically by pushing them onto the stack at the start and popping them before returning.
• Prefer xor reg, reg (or eor on ARM) to zero a register rather than mov reg, 0, since it’s often more efficient.
• Be mindful of register width — mixing 32-bit and 64-bit operations on the same register can lead to unexpected zero-extension behavior on x86-64.

Common Mistakes

• Clobbering a register that still holds needed data — one of the single most common bugs in Assembly programming.
• Forgetting that some instructions implicitly use specific registers — for example, mul on x86-64 implicitly uses rax and rdx for its result.
• Ignoring flag side effects — many instructions silently modify flags, which can break conditional logic elsewhere if you’re not careful.
• Misaligned stack operations, especially forgetting required 16-byte alignment before function calls on x86-64 System V and ARM AAPCS64.

Floating-Point Registers: A Separate World

Everything covered so far deals with general-purpose integer registers, but both architectures maintain entirely separate register files for floating-point and vector data:

; x86-64: add two floats using SSE
movss xmm0, [a]
addss xmm0, [b]

; ARM: add two floats
ldr s0, [a]
ldr s1, [b]
fadd s0, s0, s1

; x86-64: add two floats using SSE
movss xmm0, [a]
addss xmm0, [b]

; ARM: add two floats
ldr s0, [a]
ldr s1, [b]
fadd s0, s0, s1

These registers are managed independently of general-purpose registers, meaning a function can use both integer and floating-point registers simultaneously without conflict, and calling conventions specify separate rules for how floating-point arguments and return values are passed compared to integer ones.

A Note on Register Renaming (Under the Hood)

One detail that surprises many people learning Assembly: even though your code explicitly names registers like rax or x0, modern CPUs don’t actually store your data in one fixed physical location for that name. Instead, high-performance CPUs use a technique called register renaming, where the CPU internally maps each named register to one of many more physical registers behind the scenes, allowing multiple instructions that appear to conflict on the same named register to actually execute in parallel without waiting on each other unnecessarily.

This is a microarchitectural detail invisible at the Assembly level — you always write and reason about the named, architectural registers described throughout this article — but it’s worth knowing that the simple mental model of “one register, one storage slot” isn’t literally how modern high-performance CPUs implement register access internally. Understanding this can also explain why two pieces of seemingly identical Assembly code can perform differently depending on how independent their register usage is from an instruction-level parallelism perspective.

Frequently Asked Questions

Why does x86-64 have fewer general-purpose registers than ARM? This reflects their differing design histories — x86 originated as a much older, register-scarce architecture (the original 8086 had very few general-purpose registers), while ARM was designed later with a more generous, uniform register file as part of its RISC philosophy.

What happens if I run out of registers for a complex calculation? The compiler (or you, writing Assembly by hand) will “spill” values into memory temporarily, storing them on the stack and reloading them when needed, at some performance cost.

Do all Assembly languages have a flags register? Most architectures have some equivalent mechanism for tracking condition results (zero, carry, sign, overflow), though the exact name and bit layout vary — x86-64 uses rflags, while ARM uses condition flags within the pstate register.

Summary and Key Takeaways

Registers are the fastest, most central storage locations in a CPU, and nearly every meaningful Assembly instruction reads from or writes to them. x86-64 and ARM differ in register count, naming, and design philosophy, but both rely on the same fundamental cycle: load data into registers, manipulate it via arithmetic or logical instructions, update flags, and write results back to registers or memory. Mastering registers, addressing modes, and calling conventions is the foundation for writing correct, efficient Assembly code on any architecture.

A Final Thought on Practice

Reading about registers and data manipulation only gets you so far — the concepts in this article genuinely click faster once you start writing small routines yourself, stepping through them in a debugger, and watching register values change in real time. Start with simple arithmetic and comparisons, move on to loops and array indexing, and the addressing modes and calling conventions discussed here will start to feel like second nature rather than abstract rules to memorize.

References

• Intel® 64 and IA-32 Architectures Software Developer’s Manuals — intel.com/sdm
• AMD64 Architecture Programmer’s Manual — amd.com/en/support/tech-docs
• ARM Architecture Reference Manual — developer.arm.com/documentation
• Procedure Call Standard for the Arm 64-bit Architecture (AAPCS64) — developer.arm.com/documentation
• GNU Assembler (GAS) Documentation — sourceware.org/binutils/docs/as