If you’ve read anything about quantum computing in the last five years, you’ve probably seen a photo of a gold chandelier-looking device hanging inside a giant cylindrical fridge. That’s a dilution refrigerator, and the chip at the bottom of it — cooled colder than deep space — is almost certainly running superconducting qubits. This is the technology IBM, Google, and Rigetti have bet their entire hardware roadmaps on, and it’s currently the closest thing the industry has to an “industry standard” approach to building a quantum computer.
In this article I want to walk through why superconducting qubits work the way they do, what a Josephson junction actually is, why the transmon design won out over earlier approaches, and where IBM’s processors stand today. I’ll keep the math visible but not overwhelming, since understanding the underlying physics is the only way to actually evaluate the marketing claims that get thrown around in this space.
Why You Can’t Just Use an Electron as a Qubit
A classical bit is easy: it’s a voltage that’s either high or low. A qubit needs to be a quantum two-level system — something with exactly two energy states you can address, control, and read out, while somehow avoiding decoherence from the outside world for long enough to actually do something useful.
The obvious candidates are natural quantum systems: the spin of an electron, the energy levels of a trapped atom, the polarization of a photon. Each of those approaches exists as a research program (and I cover trapped ions in a separate article). But natural quantum systems have a problem: their energy levels are fixed by nature. You can’t easily dial in the transition frequency you want, and you’re stuck working with whatever coupling strengths and coherence properties the universe handed you.
Superconducting qubits take a different philosophy entirely. Instead of finding a natural two-level quantum system, engineers build an artificial one out of a superconducting electrical circuit. The energy levels are determined by the circuit’s inductance and capacitance, which means they’re tunable by design — you can engineer a qubit’s frequency, its coupling to neighboring qubits, and its interaction with control electronics almost the way you’d design any other piece of chip hardware. That’s the appeal: it borrows heavily from decades of semiconductor fabrication know-how.
The Josephson Junction: The Component That Makes It All Possible
Here’s the core problem with building a qubit out of an electrical circuit. A simple LC circuit — an inductor and a capacitor — behaves like a quantum harmonic oscillator when cooled to its ground state. The energy levels of a harmonic oscillator are evenly spaced:
$$E_n = \hbar\omega\left(n + \frac{1}{2}\right)$$
The problem with evenly spaced energy levels is that you can never isolate exactly two of them. If you try to drive a transition from the ground state $|0\rangle$ to the first excited state $|1\rangle$, you’ll also inadvertently drive the transition from $|1\rangle$ to $|2\rangle$, because the transition frequencies are identical. A qubit built this way leaks into higher states and becomes uncontrollable.
The fix is the Josephson junction: two superconductors separated by an extremely thin insulating barrier (typically aluminum oxide, just a couple of nanometers thick), through which Cooper pairs of electrons can tunnel. Brian Josephson predicted this tunneling behavior in 1962, and it turns out to have a very useful mathematical property. Unlike a normal inductor, whose energy scales quadratically with current, a Josephson junction has a nonlinear, non-dissipative inductance. The current-phase relationship is:
$$I = I_c \sin(\varphi)$$
where $I_c$ is the critical current of the junction and $\varphi$ is the phase difference of the superconducting wavefunction across the junction. This sine relationship is the key nonlinearity. When you build a circuit using a Josephson junction instead of a plain inductor, the energy levels are no longer evenly spaced. You get an anharmonic oscillator, and now you can address the $|0\rangle \leftrightarrow |1\rangle$ transition with a microwave pulse tuned to its specific frequency without significantly disturbing the $|1\rangle \leftrightarrow |2\rangle$ transition.
That anharmonicity — the difference between the $0\to1$ and $1\to2$ transition frequencies — is what makes a two-level qubit possible out of what would otherwise be a multi-level oscillator.
From Cooper Pair Box to Transmon
The earliest superconducting qubit designs, developed in the late 1990s and early 2000s, are usually grouped into three families based on which physical variable dominates the qubit’s behavior: charge, flux, or phase.
The charge qubit (also called the Cooper pair box) was the first working superconducting qubit, demonstrated in 1999. It’s essentially a small superconducting island connected to the rest of the circuit through a Josephson junction, and its quantum states are distinguished by the number of Cooper pairs on the island. The problem with charge qubits is that they’re extremely sensitive to charge noise — stray electric fields from defects in the substrate or nearby materials cause the qubit’s frequency to fluctuate randomly, which destroys coherence. Early charge qubits had coherence times measured in nanoseconds.
The breakthrough came in 2007, when a team at Yale (including Robert Schoelkopf and Michel Devoret, whose work would later contribute to a Nobel Prize in Physics) introduced the transmon. The idea is almost deceptively simple: shunt the Josephson junction with a large capacitor. This changes the ratio between the Josephson energy $E_J$ and the charging energy $E_C$, pushing the qubit deep into a regime where $E_J/E_C \gg 1$.
Why does this help? The charge noise sensitivity of the qubit falls off exponentially as this ratio increases, while the anharmonicity (which you still need to isolate two levels) only falls off polynomially. In other words, by shunting the junction with a big capacitor, you trade away a modest amount of anharmonicity for an enormous improvement in noise immunity. That trade turned out to be an excellent one — transmon coherence times went from nanoseconds to tens and eventually hundreds of microseconds, and the design has been the dominant superconducting qubit architecture ever since. Every current IBM quantum processor uses transmon qubits.
How a Transmon Actually Gets Controlled
A transmon qubit sits on a chip, coupled to a microwave resonator (usually a coplanar waveguide) used for readout, and to neighboring qubits via couplers for two-qubit gates. Operating one requires several distinct engineering pieces working in concert:
Single-qubit gates are performed by sending carefully shaped microwave pulses at the qubit’s transition frequency (typically in the 4–8 GHz range) down a control line. The pulse’s amplitude, phase, and duration determine which rotation on the Bloch sphere you’re implementing. A common technique called DRAG (Derivative Removal by Adiabatic Gate) shapes the pulse envelope specifically to suppress unwanted leakage into the $|2\rangle$ state, which is always lurking nearby given the transmon’s modest anharmonicity.
Two-qubit gates are where a lot of the hardware engineering effort goes. Early designs relied on fixed capacitive coupling between neighboring qubits combined with techniques like the cross-resonance gate, where you drive one qubit at the frequency of its neighbor to generate an effective interaction. IBM’s earlier processors (Eagle and Condor) used this cross-resonance approach. The problem is that fixed coupling is always “on,” which creates unwanted crosstalk between qubits that aren’t supposed to be interacting during a given operation.
IBM’s Heron architecture addressed this with tunable couplers — an additional circuit element between each pair of qubits whose effective coupling strength can be turned up or down electronically. When you’re not executing a two-qubit gate between a given pair, you tune the coupler to near-zero coupling, dramatically suppressing crosstalk. This was one of the most important architectural shifts in IBM’s recent hardware, and it’s a major reason Heron devices outperform the earlier, larger-qubit-count Eagle and Condor chips on real circuit fidelity.
Readout works by coupling each qubit to its own microwave resonator. The resonator’s frequency shifts slightly depending on whether the qubit is in $|0\rangle$ or $|1\rangle$ (a phenomenon called the dispersive shift), so sending a microwave probe tone through the resonator and measuring the reflected phase tells you the qubit’s state without directly interacting with the qubit itself.
The Cooling Problem
None of this works above about 15 millikelvin, which is why every photo of a superconducting quantum computer shows that chandelier-shaped dilution refrigerator. Thermal energy at any higher temperature would populate the qubit’s excited state randomly and destroy superconductivity in the aluminum wiring itself. Getting a chip to these temperatures, wiring in thousands of control lines without introducing excess heat or noise, and doing it all at a scale that could eventually house thousands of qubits, is a serious cryogenic and microwave engineering challenge in its own right — arguably as hard as the qubit physics.
This is part of why IBM’s roadmap increasingly talks about modular architectures. Cramming more and more qubits onto a single chip inside a single fridge runs into wiring density and thermal load limits. IBM’s strategy going forward, embodied in their planned Flamingo-generation systems, is to link multiple chips together via quantum-coherent interconnects rather than scaling a single monolithic chip indefinitely.
IBM’s Processor Lineage
It’s worth walking through IBM’s actual hardware history because the qubit-count headlines can be misleading if you don’t know what’s behind them.
- 2016: A 5-qubit processor put on the cloud — the first time anyone outside a research lab could run a real quantum circuit remotely.
- 2019: Falcon, 27 qubits.
- 2020: Hummingbird, 65 qubits.
- 2021: Eagle, 127 qubits — the first processor to break the 100-qubit mark, using the cross-resonance gate scheme.
- 2022: Osprey, 433 qubits.
- Late 2023: Condor, 1,121 qubits — a heavy-hex lattice layout with over a mile of cryogenic wiring packed into a single fridge. IBM has been explicit that Condor was primarily a scaling and manufacturing-yield exercise rather than a processor meant to demonstrate best-in-class performance; its per-qubit fidelity is comparable to the earlier Osprey chip, not better.
- December 2023 onward: Heron r1 (133 qubits), followed by Heron r2 and r3 (156 qubits), introduced the tunable-coupler architecture and became IBM’s actual performance flagship. Heron r3 became available in beta via the ibm_pittsburgh system and represents IBM’s best coherence and readout fidelity to date on this line.
- Nighthawk: IBM’s newer architectural direction, featuring 120 qubits arranged on a square lattice with four-way connectivity per qubit (rather than the three-way connectivity of the heavy-hex layout), intended to support more complex circuit structures.
The pattern that emerges is important: IBM stopped chasing raw qubit count as the headline metric somewhere around 2023, and started emphasizing quantum volume and, more recently, circuit layer operations per second (CLOPS) and two-qubit gate error rates as the numbers that actually predict whether a chip can do useful work. Heron’s 156 qubits with two-qubit gate errors around 0.3% or better are, for most practical algorithmic purposes, a more capable device than Condor’s 1,121 qubits with older-generation gate fidelities. This is a point worth remembering any time you see a qubit-count comparison chart — qubit count alone tells you almost nothing about what a processor can actually compute.
Advantages of the Superconducting Approach
Speed. Superconducting gates execute in tens of nanoseconds, orders of magnitude faster than trapped-ion gates, which typically take microseconds. For algorithms requiring many sequential gate operations, this speed advantage matters.
Fabrication leverage. Because these are lithographically patterned circuits, superconducting qubit chips can draw on decades of semiconductor fabrication infrastructure, including techniques from conventional chip manufacturing. IBM explicitly uses 300mm wafer fabrication techniques borrowed from the classical chip industry.
Design flexibility. Since the qubit properties come from circuit design rather than atomic physics, engineers have real freedom to tune frequencies, coupling strengths, and layout — useful for avoiding frequency collisions between neighboring qubits and for architectural experimentation.
Limitations and Open Challenges
Coherence times remain a bottleneck. Even IBM’s best current transmons have coherence times (T1 and T2) in the hundreds of microseconds. That sounds long until you realize a deep quantum circuit with many sequential gates can eat through that budget quickly, especially as circuit depth grows with problem size.
Connectivity is limited by geometry. A qubit on a chip can only be physically wired to its nearest neighbors. Heavy-hex layouts give each qubit two or three neighbors; Nighthawk’s four-way connectivity is an improvement but still nowhere near the all-to-all connectivity you get with trapped ions. This means many algorithms require inserting SWAP gates to move quantum information across the chip, adding overhead and error.
Crosstalk and frequency collisions. With thousands of qubits on a chip, avoiding unwanted interactions between adjacent qubits — and finding enough distinct frequencies to address each qubit individually without collision — becomes a genuinely hard combinatorial fabrication problem as chips scale up.
Cryogenic wiring at scale. Every qubit needs its own control and readout lines running from room-temperature electronics down to the millikelvin stage. This “wiring bottleneck” is one of the most cited engineering obstacles to scaling superconducting processors past a few thousand qubits, and it’s the direct motivation behind IBM’s move toward modular, multi-chip architectures.
Error correction overhead. Current superconducting qubits are what the field calls NISQ-era devices — noisy, intermediate-scale quantum hardware. To run algorithms that need provably correct answers (like Shor’s algorithm at cryptographically relevant scale), you need quantum error correction, which requires bundling many physical qubits into a single logical, error-corrected qubit. Estimates for how many physical qubits are needed per logical qubit vary by error-correction code and target error rate, but numbers in the range of hundreds to over a thousand physical qubits per logical qubit are common in current projections. This is the real reason “1,121 qubits” doesn’t mean IBM has 1,121 usable computational units in the way people might assume — it means, in current fault-tolerant terms, a small fraction of a single logical qubit.
What’s Established vs. What’s Still Ahead
It’s worth being explicit about what’s demonstrated technology and what’s still aspirational. Transmon qubits, Josephson junction fabrication, cross-resonance and tunable-coupler two-qubit gates, and dispersive readout are all mature, established techniques running in production hardware today — you can log into IBM Quantum right now and run circuits on real Heron processors.
What is not yet established is large-scale fault-tolerant computation. IBM’s own public roadmap targets an early fault-tolerant system, referred to as Starling, later in the decade, with a full error-corrected architecture intended by around 2033. Claims of “quantum advantage” on specific narrow tasks (certain sampling problems, some quantum simulation and optimization demonstrations) have been made by IBM, Google, and others, but broad, unambiguous, practically useful quantum advantage over classical computers for real-world problems is still a matter of active research and, in some announced cases, active scientific dispute over whether classical algorithms can match the claimed results.
Where This Leaves Us
Superconducting qubits are the most mature and most heavily invested-in approach to quantum computing hardware today, and IBM’s transmon-based roadmap is the most visible expression of that bet. The physics is genuinely elegant: take a nonlinear circuit element that only superconductivity makes possible, engineer it into a regime where it behaves like an artificial atom, and you get a qubit you can manufacture with lithography and control with microwave electronics. But the gap between “we can build a chip with over a thousand qubits” and “we can run fault-tolerant algorithms that outperform classical computers on problems anyone actually cares about” remains large, and closing it is as much an engineering and error-correction problem now as it is a physics problem. For anyone in computer science, cybersecurity, or engineering trying to gauge how seriously to take near-term quantum computing claims, the honest answer is: the hardware is real and improving quickly, but treat qubit-count headlines with real skepticism, and pay attention to gate fidelity and error-correction progress instead.
